Bank selection mechanism is well known in the art of microprocessor architecture. It is usually applied in low cost systems that provide a limited number of bits in the instruction word and therefore have only a limited addressing capability. For example, if an instruction word is limited to provide a maximum of 7 bits for an address, a single instruction word can only address 128 memory locations. A bank select mechanism can be used to select a memory bank, for example a bank addressing 128 memory locations in the above mentioned example. The bank select register can be a separate register that may be memory mapped or it may be part of a status register in very low cost microprocessors or microcontrollers and only provide for 2 bits. An example for such a bank select register is the PIC16 family, see also “PICmicro™ Mid-Range MCU Family reference Manual”, 1997 available from Microchip Technologies Inc. which is hereby incorporated by reference. The status register incorporates 2 bits for selecting one of four data memory banks and 1 bit for selecting one of two program memory banks. Thus, these type of microprocessors or microcontrollers are limited to a maximum of 4×128 bytes=512 bytes, wherein certain memory locations in the data memory are used to memory map special function registers which then further reduces the number of general purpose registers in the data memory to a maximum of typically around 368 bytes depending on the implementation.